![]()
Overview
The preamp output pulse is delivered to the baseline subtractor system over twist and flat cable. Each bunch crossing the charge received by the preamp, produces a step function in the preamp output with a rise time of about 430ns. The step then decays with a very long time constant of 15 micro sec. The output is therefore, cumulative over successive bunch crossings. The preamp output is differentiated to extract the height of the voltage step with two RC circuits. They act as high-pass frequency filters, one to shape and one to cancel the decay of the preamp.
The voltage from the output is stored in an analog pipeline consisting of an array of capacitors called the Switched Capacitor Array (SCA). Since the readout time is approximately 6 micro sec, a second SCA is written to while the triggered one is readout. This gives a deadtimeless solution assuming that only one trigger is allowed per superbunch.
Schematic diagram of the Baseline Subtractor (BLS) system
Shaper
and Hybrids
Analog
Buffer Daughter Board
Sample Hold and Output Buffer
BLS
Motherboards
BLS
Backplanes
BLS
Power Supplies
BLS
Crate Controllers
Power
Supply Picture