DØ Calorimeter Electronics Upgrade Meeting Minutes

September 16, 1999

present:
D. Schamberger, M. Tuts, D. Huffman, L. Bagby, P. Liston, D. Elvira, L. Groer, C. Hays, B. McCarthy, B. Olivier

on video:
Paris: U. Bassler, F. Machefert, G. Bernardi
Meeting time is 9:00 am, Thursdays in DAB1. Video connection available.
Contact Leslie Groer groer@fnal.gov.

= ACTION ITEM

Pulser System

UB reported they have received and tested the prototype of the pulser controller card.  They are ready to give the go ahead with production.  These should be done by end of September.
Paris needs a estimate for the PS monitor boards + parts - DH will send it to UB.
Orsay is still on schedule for Nov 8-14, Paris for Nov 29-Dec10.  We need to ensure they have access.
 
Power Supplies DH working on details of monitor board and PS.  He has a schematic for the front panel of the pulser PS that he will put in.pdf on the web.  HL needs the dimensions.  There are 4 cut-outs for 37-pin D-type connectors in the back and one fused AC connector.
Paris will ship their PS and we will add monitor boards and front panels.
We have two monitor boards and they will be stuffed Monday.  DH has run the 2nd supply with 20 amps on all the outputs with no problems.  He wants to add some cooling shunts as the board runs a little hot (> 50 deg C).
We need to order about 60 more monitor cards once the tests of the prototypes are done.  We need to get into Bob Jones queue if his group will do the stuffing.
DH wants to move the 1553 nodes from the 2nd floor to the 3rd floor.  The CCSE 1553 seems to have died.  After the power outage last week the 1554 on the test bench got an old IP address.
Preamps LB spoke to TY,Vista.  They claimed to be missing 2900 samtec connectors.  One box was marked -02 for the pulled pins.  They will change the label to -01.  There is a new person there - Arianna.  They will ship parts to KTY which should take a few days.
LaTech sent a fax - they have had equipment problems.
The PO for the H-species got lost in the system.  A 2nd copy has been sent to purchasing.
The H-jig boards are back.  A few minor fixes needed to be made (e.g. power connectors).  Both boards are ready to power up.  The ZIFs are in.  Just need sitches and FETs.
LB modified He's to make the other H's and got them within 1%.  She used the old jig to measure these and to compare the windows to the spice model.  All where within the window except for Hb which was on the edge.  The suggestion was to make another Hb to check this.  This holds up shipping the jig to KTY by a couple of days.
LB has been asked to spen 30-50% of her time at SIDEP.  MT will talk to Marvin Johnson.
DS has 0.1 uF 0805 caps that we can use for preamp motherboard production.  MT mentioned that we should have the 0.1% precision resistors mid-October.
LG reported that we have the wider rails (200) - we can use these in the r.h.s. of the 5k test stand box with the thick preamp motherboards.
LG has been looking at the temps in the preamp box.  He has data from pulser runs as the temp increased.  We should maybe try the collimator for the fans to see if this makes a difference.
BLS DS has all the parts for 5000 shapers.  MTI should get these to him on (or before) schedule.  There could be a long delivery time for the production quantity of 10 uF ceramic SMT caps but for $5k extra we can get these in Feb 2000 rather than Sep 2000.
DS installed a few shapers and ran for a while - saw oscillations of about 100 MHz.  There is an ACT device (with high impedance) which was not connected to anything - this provided cross-talk to the PS and got into the preamp input.  Tying this to a volatge stops the oscillation.
The shapers work fine.  DS has enough parts for about 40 daughterboards.  There are about 100 SMT pieces per daughterboard.  He hoped that the protoype will be ready soon and can start production by Oct 12.
Dan and DS have been working on the T+C link.  They see signals from the D0 clock.
DS has a new EE grad student working on relayout of the T+C.  We need a bigger FPGA and want to have a better defined interface between the motherboard and the FPGA to isolate changes.  SUNYSB is getting a new logic analyzer which should help debugging.
Infrastructure MT discussed infrastructure issues.  Data taking begins 02/2001 on the new schedule.  Cosmic ray runs are scheduled for late summer 2000 with CC and fiber tracker.  Our schedule shows we have all pieces by Aug 2000.  There is a possibilty of a 3 month engineering collider run starting April.
We should have a tech. starting in Nov.
There was a discussion of whether we need an engineering physicist to help with commissioning (replacement for the Guida sisters).  Long term maintenance is an issue.
Pete Simon wants to turn off chilled water in the DAB for about a week.  Not sure when this will be scheduled.
Timing and Control DE has compiled and tested the simulation code.  He needs a complete sequence of input signals - he is checking these.  He also needs to define the output signals a bit better.  This is a big piece of the design which will need to be integrated once it is complete. SCAs PL reported that 6" wafers are being packaged.  He will look into the MTBF for the burn-in tests we have done so far.

This page updated 30-September-1999
Send comments/corrections to Leslie Groer groer@fnal.gov