Datapump Board

General Information

The datapump board is a data pattern generator that sends data over 28-bit LVDS channel links. It is designed to send and receive data to and from DFE motherboards, AFE's, and other hardware using 28-bit or 21-bit LVDS channel links.

For each transmitter 128 unique 28-bit words are defined by the user. The transmitters run continuously and are guaranteed to be in sync with each other. All transmitters run off of a local 50MHz oscillator, but have the option of running off of an external clock as well.

Each of receivers can trigger on a user-defined data pattern and then capture up to 256 words and store the data in a memory for later readout. All receivers are fully independent.

A PC is used to download the firmware to the datapump's 3 FPGAs via the PC's Enhanced Parallel Port (EPP). After configuration all communication with the datapump occurs over the same parallel port cable. It is important that the PC parallel port is configured as an Enhanced Parallel Port (EPP). Usually this is done in the BIOS setup menu on newer motherboards.

The PROBLEM is that parallel ports are rapidly disappearing from PCs and even if a PC has a parallel port it may not fully support the EPP functionality. We have seen problems with Phoenix BIOS machines and EPP ports where the port locks up and the PC must be rebooted. Furthermore with every new OS it becomes more and more difficult to get to the actual hardware. The Datapump spreadsheets use a hack to get to the hardware on NT and XP operating systems... but it's just ugly.

The Datapump is not recommended for new designs. Use the simulation tools instead for much better visibility. If one really needs to look at an LVDS link use the newer cable test board.

Firmware

Three Xilinx Virtex FPGAs are used to store the data patterns. These FPGAs were selected because they're fast,
inexpensive and feature lots of dedicated 4k-bit true dual-port RAMs.

The three FPGAs are:

  1. U3. XCV50-4PQ240C. Drives transmitters TXA, TXB, TXC, TXD, and TXE.
  2. U2. XCV50-4PQ240C. Drives transmitters TXF, TXG, TXH, TXJ, and TXK.
  3. U1. XCV50-4PQ240C. Stores data from the RXA, RXB, RXC, and RXD receivers.

Firmware directory.

Operation

  1. Open up the datapump2.xls spreadsheet in Microsoft Excel. Make sure that the datapump has power and that it is connected to the EPP parallel port on the PC. Press the "Configure Datapump" button. Configuration takes ~5 seconds. Verify that Datapump LED D2 is lit.
  2. Make changes to the transmitter vectors as necessary. Click the "Download Vectors" button when done.
  3. Press the "Verify Vectors" button. The datapump will read back the transmitter vector data from U3 and U2 and compare it to what was entered in the speadsheet. Any differences will be highlighted in yellow in the area directly below the transmitter vectors.
  4. The datapump receivers work much like a logic analyser. Each receiver can trigger indepentantly on a user-defined pattern for the lower 16-bits of the receiver. Don't care (X) values are supported. Enter in the trigger patterns.
  5. Press the "Arm Trigger" button. The receiver memories are cleared, the trigger pattern downloaded, and the triggers armed. As soon as the lower 16 bits of the incoming data matches the trigger pattern the receiver will capture the next 256 words and then halt.
  6. Press the "Readout Receiver" button to refresh the received vectors in the worksheet. Note that the most significant nibble of the received data contains an incrementing four bit counter.

Software

The software runs under Microsoft Excel and is available as a spreadsheet with embedded VBA code.

There is also a Powerpoint presentation describing datapump operation and the VBA drivers.

CAD files

Schematic: [PDF] and [DSN]
Layout: Gerbers and [MAX]

Images

datapump2.jpg and datapump3.jpg.