DFE | RunIIb
Notes on DFEA2 Checkout and Testing.
The hardware and firmware are being designed by Shouxiang Wu at Boston University. His project area is at http://physics.bu.edu/~wusx/download/.
Simulation notes concerning the L1CTOC and L1muon outputs of the DFEA2.
The DFEA2 has been 'dialed in' to the SCL timing and now shows perfect agreement between the embedded control bits coming from the AFE/MIXER and the SCL. The installed DFEA2 appears to be happy with its inputs and it's generating what appears to be properly formatted output records.
March 2005: DFEA2 is running with "compatibility mode" doublet firmware. DFEA2 and DFEA L1 output seems to be in agreement. Mike Cooke has produced a special set of examine plots to compare DFEA and DFEA2 L1 data records. L2CFT, L2CPS, and L1muon output records agree with the DFEA in the testbench simulator.
May 2005: update -- production boards have arrived here at DZERO. On the platform the two proto DFEA2 boards are running with newer singlet firmware and now the DFEA2 and DFEA L1 data does not agree. This is to be expected.
DFEA2 PRR comments are here: PDF, and DOC
July 2005: update -- When loaded with equivalent [doublet] track equations the DFEA2's output (L1, L2CFT, L2CPS, and muon) matched exactly with the DFEA. With the proper track equations the DFEA2 boards very closely emulate the current DFEA boards.
L1mu BNC support plate has been fabricated and installed in the crates at the combined test stand.
DFEB2 backplanes require slight modifications prior to installation on the platform. Minor stuff.
Operational Readiness Clearance (ORC) documentation is available as a [PDF] file. Updated 4 April 2006.
48VDC power distribution will be used on these crates. There is concern that adding multiple DC-DC converters may couple noise into the sensitive calorimeter electronics. A didt DC-DC converter was recently tested on the center platform near these electronics, and no additional noise was observed in the calorimeter readout. The electrical characteristics of the didt converter were recently tested, results are here.
Shindengen HS1201 power supplies will be used supply bulk 48V power to the crates. These supplies conform to the SSI DPS specification, which means that multiple vendors are producing equivalent units.
Full crate testing (test stand) shows power consumption is roughly 250W with all DFEA2 boards initialized. We were budgeting 1200W per crate, so there is plenty of margin here.
No evidence of DC-DC converter switching regulator "mode locking".
Basic command line utilities were written by BU, available here. These must be run as root to access the hardware directly.
The dfecd program is an iterative server process that talks to the NIC and the DFEC2 boards. It must be run as root. The clients are user-level programs that connect to the server via a simple sockets interface. Multiple clients may run concurrently and the server will allow them all to access the hardware. A copy of this software is available here. This archive includes documentation and some simple example clients, too. This software will NOT be used, EPICs will be used instead.
Production run of 10 boards is complete. All boards tested good; yield was 100%. Firmware is stable, no bugs reported. Geoff Savage has modified EPICs to communicate over our ethernet cards to the DFEC2 and this new software is working and running on our test stand.
Information on how to setup the Linux NIC driver is here. DFEC2 board mods are here.
This Specification for the coaxial cable "pigtail" cables which connect the SLDB transmitter ouputs and to the LMR200 coax cables used by L1muon and L1caltrk.
Pigtail coaxial cables have been assembled and tested. They're being fastened to the DFEA2 boards now. The cable support bracket is being designed now.
All LVDS cables are installed.
Gigabit Ethernet Fiber optics are installed. Online Linux PCs (d0ol10 and d0ol11) have been moved into place in MCH2.