- Looked at Triple Digitization Data with respect to the ICD
- Considered Channel, Drawer and Crate Level Timing
- Crate 4, ICD Southwest

v18 corrected, FPGA

30668 events processed

- Put cut on maximum 1000 ADCs for Nominal ADC value

- Combined all channels for SW10, SW11, SW12, SW14, SW15, SW16
- Decreased bin size from 0.1 to 0.05 for ratios
- Added pair of Early/Nominal and Late/Nominal ratios for Nominal ADC > 20
- Fit shapes to Gaussian (ADC>10, 15 and 20)

- Combined all channels of SW10, SW11, SW12, SW14, SW15, SW16
- Obtain approximate timing for ICD in Crate 4
- Early/Nominal = 1.0 and Late/Nominal = 0.63 for Nominal ADC > 20

v17, FPGA

16091 events processed

- Combined all channels of SW10, SW11, SW12, SW14, SW15, SW16
- Obtain approximate timing for ICD in Crate 4
- Early/Nominal = 0.67 and Late/Nominal = 0.74 for Nominal ADC > 20

- Why do we see the "bump" at zero for the ratios?
- How can Early or Late be about zero when the Nominal > 20 ADC?
- Is it Gain related?

- Is it SCA related?
- Yes!

- Finer scale (bins of 10)
- Y-Axis: L1scaAdd + 48*L1scaUse + 100*L2sca

- Looked at Crate 6 ADC Spectrum
- Zero-bias Run 127290, Pedestal Subtracted, non-zero suppressed
- No electronics for SW6. Half-tile for SW7 not yet installed

Bad SCA |
||

Bad SCA |

- Looked at Crate 6 ADC vs SCA
- Zero-bias Run 127290, Pedestal Subtracted, non-zero suppressed

Bad SCA |
||

Bad SCA |

- Do you see a pattern?
- For each set of six channels, the 3rd and 6th plots have vertical stripes.
- This corresponds to Depth 6 (drawer channel 6) and 9 (drawer channel 3) for a given Tower.
- As a reminder, recall the ADC vs SCA distributions for ICD in Crate 4.

v17, FPGA

16091 events processed

ICD Southeast in Crate 6

- v17 FPGA
- Combined all channels of SE1, SE2, SE3, SE4, SE5 and SE8
- Obtain approximate timing for ICD in Crate 6
- Early/Nominal = 0.63 and Late/Nominal = 0.72 for Nominal ADC > 20

- v17 FPGA
- Combined all channels of SE1, SE2, SE4 and SE8
- Neglected channels from bad SCA (SE3 and SE5)
- Obtain approximate timing for ICD in Crate 6
- Early/Nominal = 0.65 and Late/Nominal = 0.74 for Nominal ADC > 20

- v18 corrected FPGA
- Combined all channels of SE1, SE2, SE4 and SE8
- Neglected channels from bad SCA (SE3 and SE5)
- Peak at zero is much larger. Why?
- Obtain approximate timing for ICD in Crate 6
- Early/Nominal = 0.97 and Late/Nominal = 0.63 for Nominal ADC > 20

- Looked at Crate 5 ADC Spectrum
- Zero-bias Run 127290, Pedestal Subtracted, non-zero suppressed

- Looked at Crate 5 ADC vs SCA
- Zero-bias Run 127290, Pedestal Subtracted, non-zero suppressed

- v18 corrected FPGA
- Combined all ICD channels from Crate5
- Peak at zero. Due to bad SCA channels?

- v18 corrected FPGA
- Combined all channels of SW1, SW2, SW3, SW4, SW6 and SW7
- Neglected channels from bad SCA (SW5 and SW8)
- Obtain approximate timing for ICD in Crate 5
- Early/Nominal = 0.90 and Late/Nominal = 0.59 for Nominal ADC > 20

- v17 FPGA
- Combined all channels of SW1, SW2, SW3, SW4, SW6 and SW7
- Neglected channels from bad SCA (SW5 and SW8)
- Obtain approximate timing for ICD in Crate 5
- Early/Nominal = 0.54 and Late/Nominal = 0.71 for Nominal ADC > 20

- Looked at Crate 7 ADC Spectrum
- Zero-bias Run 127290, Pedestal Subtracted, non-zero suppressed

- Looked at Crate 7 ADC vs SCA
- Zero-bias Run 127290, Pedestal Subtracted, non-zero suppressed

- v17 FPGA
- Combined all ICD Channels in Crate 7
- Very wide distributions. Why?

- v17 FPGA
- Combined all channels of SE9, SE11, SE13, SE14, SE15 and SE16
- Neglected channels from bad SCA (SE10 and SE12)
- Obtain approximate timing for ICD in Crate 7
- Early/Nominal = 0.59 and Late/Nominal = 0.70 for Nominal ADC > 20

- v18 corrected FPGA
- Sam job did not finish correctly.
- Ran out of disk space in Louisiana Tech disk on d0mino (/tmp_root/740/lat_1/)

Crate | FPGA | Early/Nominal | Late/Nominal | Comments |
---|---|---|---|---|

4 | v17 | 0.67 | 0.74 | bad pedestals SW9,SW13 |

5 | v17 | 0.54 | 0.71 | bad SCAs SW5,SE8 |

6 | v17 | 0.65 | 0.74 | bad SCAs SE3,SE5 |

7 | v17 | 0.59 | 0.70 | bad SCAs SWE10,SE12 |

4 | v18 corr | 1.0 | 0.63 | bad pedestals SW9,SW13 |

5 | v18 corr | 0.90 (1.0) | 0.59 | bad SCAs SW5,SW8 |

6 | v18 corr | 0.97 | 0.63 | bad SCAs SE3,SE5 |

7 | v18 corr |

Last modified: Tue Dec 10 20:14:54 CST 2002
Web page by Alan L. Stone:
alstone@fnal.gov |