Goals:
(1) agree upon conceptual design of L2STT, including:
    * number of different new card designs,
    * use of mother/daughterboards,
    * backplanes,
    * specification of communication links
       - within L2STT
       - between L2STT and rest of DØ
    * possible use of components from other parts of the trigger
 
(2) draft preliminary schedule to be presented to DØ management

(3) plan engineering meeting schedule

Agenda:
(1) status reports:
    9:00- 9:20 FRC design, control data format, event buffer control [Hal Evans]
    9:20- 9:50 STC design, clustering, hit filter [Bill Earle, Roberto Brown]
    9:50-10:05 look-up method for track fitting [John Hobbs]
   10:05-10:10 timing for track fitting in FPGA  [Wendy Taylor]
 
 -----------  break   -------------------

(2) conceptual design issues:
 
   11:30-11:45 Use of DFE board for FRC [Hal Evans]
   10:45-11:00 Use of DFE board for TFC [John Hobbs]
   11:00-11:15 Use of DFE board for STC [Ulrich Heintz]
   11:00-12:00 strawman design using common mother board [Eric Hazen]
 
 -----------  lunch  ----------------------
 
   13:00-13:30 VTM [Ed Barsotti, Bill Hanes]
   13:30-14:30 discussion on conceptual design
 
(3) design and production schedule
   14:30-15:15 discussion [Ulrich Heintz]

(4) engineering meeting schedule
   15:15-15:30
 
-------------  break  ---------------

(5) other topics
   16:00-16:20 - truncation studies [Maurice Leutenegger]
   16:20-16:40 - queueing studies [Stephan Linn/Sailesh Chopra]
   16:40-17:00 - trigger simulation status, monitoring [Sailesh Chopra]
   17:00-17:20 - CTT broadcasting, sector overlap [Brian Connolly]
 

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