\contentsline {section}{\numberline {1}Introduction}{1}
\contentsline {section}{\numberline {2}Signal Path in the Run 1 Electronics Version}{2}
\contentsline {section}{\numberline {3}Modifications for Run 2}{3}
\contentsline {section}{\numberline {4}The Preamplifier System (WBS 1.2.1.1)}{5}
\contentsline {subsection}{\numberline {4.1}Preamplifier Input Cables (WBS 1.2.1.6)}{5}
\contentsline {subsection}{\numberline {4.2}Preamplifier Hybrids (WBS 1.2.1.1.2)}{8}
\contentsline {subsubsection}{\numberline {4.2.1}Preamplifier Test Jig}{16}
\contentsline {subsection}{\numberline {4.3}Preamplifier Motherboards (WBS 1.2.1.1.3)}{16}
\contentsline {subsubsection}{\numberline {4.3.1}Preamplifier Motherboard Testers}{17}
\contentsline {subsection}{\numberline {4.4}Preamplifier Power Supplies (WBS 1.2.1.1.4)}{18}
\contentsline {section}{\numberline {5}Baseline Subtractor System (WBS 1.2.1.2)}{21}
\contentsline {subsection}{\numberline {5.1}Overview}{21}
\contentsline {subsection}{\numberline {5.2}Shaper and x1x8 Hybrids (WBS 1.2.1.2.3)}{22}
\contentsline {subsection}{\numberline {5.3}Switched Capacitor Array (SCA) (WBS 1.2.1.2.2)}{26}
\contentsline {subsubsection}{\numberline {5.3.1}Testing and Problems}{27}
\contentsline {subsubsection}{\numberline {5.3.2}SCA Test Procedure and Implementation}{28}
\contentsline {subsection}{\numberline {5.4}Analog Buffer Daughter Board (WBS 1.2.1.2.4)}{29}
\contentsline {subsection}{\numberline {5.5}Sample \& Hold and Output Buffer (WBS 1.2.1.2.5)}{29}
\contentsline {subsection}{\numberline {5.6}BLS Motherboards (WBS 1.2.1.2.6)}{30}
\contentsline {subsection}{\numberline {5.7}BLS Backplanes (WBS 1.2.1.2.7)}{30}
\contentsline {subsection}{\numberline {5.8}BLS Power Supplies (WBS 1.2.1.2.8)}{30}
\contentsline {subsection}{\numberline {5.9}BLS Crate Controllers (WBS 1.2.1.2.9)}{30}
\contentsline {section}{\numberline {6}ADC Controllers (WBS 1.2.1.3)}{31}
\contentsline {section}{\numberline {7}Timing and Control System (WBS 1.2.1.4)}{32}
\contentsline {subsection}{\numberline {7.1}Description of Signals}{32}
\contentsline {subsection}{\numberline {7.2}FPGA Timing and Control Chip}{34}
\contentsline {subsubsection}{\numberline {7.2.1}Clock Generator}{35}
\contentsline {subsubsection}{\numberline {7.2.2}Write Address Generator}{35}
\contentsline {subsubsection}{\numberline {7.2.3}Write Address Multiplexer}{35}
\contentsline {subsubsection}{\numberline {7.2.4}Level-1 Trigger Decision Processor}{37}
\contentsline {subsubsection}{\numberline {7.2.5}Timing and Control Signal Generator}{37}
\contentsline {subsection}{\numberline {7.3}Status and Plans}{39}
\contentsline {section}{\numberline {8} Calibration Pulser System (WBS 1.2.1.5)}{40}
\contentsline {subsection}{\numberline {8.1}Overview}{40}
\contentsline {subsection}{\numberline {8.2}Run I Calibration system}{40}
\contentsline {subsection}{\numberline {8.3}Modifications for Run II}{41}
\contentsline {subsection}{\numberline {8.4}Run II calibration system}{43}
\contentsline {subsection}{\numberline {8.5}Plans and Schedule of the Hardware}{44}
\contentsline {section}{\numberline {9}Online Calibration}{47}
\contentsline {subsection}{\numberline {9.1}Important Calibration variables}{47}
\contentsline {subsection}{\numberline {9.2}Input and Output of Online CALIB}{48}
\contentsline {subsection}{\numberline {9.3}The Online CALIB Framework and CALIB software}{49}
\contentsline {subsection}{\numberline {9.4}Plans, Timescale and Manpower}{49}
\contentsline {section}{\numberline {10}System Tests}{51}
\contentsline {section}{\numberline {11}Physics Implications of the Calorimeter Upgrade}{52}
\contentsline {section}{\numberline {12}Organizational Issues}{54}
\contentsline {subsection}{\numberline {12.1}Cost}{54}
\contentsline {subsection}{\numberline {12.2}Schedule}{54}
\contentsline {subsubsection}{\numberline {12.2.1}Milestones}{54}
\contentsline {subsubsection}{\numberline {12.2.2}Critical Path}{54}
\contentsline {subsubsection}{\numberline {12.2.3}Status}{54}
\contentsline {subsection}{\numberline {12.3}Manpower}{61}
\contentsline {section}{\numberline {13}Appendices}{62}
\contentsline {subsection}{\numberline {13.1}EC Preamplifier Input Cable Lengths}{62}
\contentsline {subsection}{\numberline {13.2}Preamplifier Test Jig}{62}
\contentsline {subsubsection}{\numberline {13.2.1}Introduction}{62}
\contentsline {subsubsection}{\numberline {13.2.2}Theory of Operation}{65}
\contentsline {subsubsection}{\numberline {13.2.3}Summary}{67}
\contentsline {subsection}{\numberline {13.3}Preamplifier Power Supplies}{69}
\contentsline {subsubsection}{\numberline {13.3.1}Preamplifier Power Supply Location and Shielding}{69}
\contentsline {subsubsection}{\numberline {13.3.2} Magnetic Field Tests}{69}
\contentsline {subsection}{\numberline {13.4}Switched Capacitor Array}{72}
\contentsline {subsubsection}{\numberline {13.4.1}SCA Packaging}{72}
\contentsline {subsubsection}{\numberline {13.4.2}SCA Test Results}{74}