WIDE ANGLE MUON SYSTEM (WAMUS) ELECTRONICS DETECTORS ========= Proportional Drift Tubes (PDT): A-layer: 18 PDT's (1728 drift cells) 4 Front End Boards (FEB) / PDT (24 channels / FEB capacity) B-layer: 38 PDT's (2424 drift cells) 2-3 Front End Boards (FEB) / PDT C-layer: 38 PDT's (2616 drift cells) 2-3 Front End Boards (FEB) / PDT 1 Control Board (CB) / PDT (mounted on PDT) 1 cable / CB to MTC10 (96 bits / cable (A) or 48-72 bits / cable (B&C)) 1 cable / CB to L2 1 cable / CB to MRC Central Muon SCintillator (CMSC): A-layer: octants 0,1,2,3,4,7: 90 channels / octant 2 FE cards / octant (45 channels / FE card ) 2 cables / octant to passive fanout card (45 bits / cable) 2 cables / passive fanout card to MTC05 (45 bits / cable) 2 cables / passive fanout card to MTC10 (45 bits / cable) OR 3 FE cards / octant (30 channels / FE card ) octants 5,6: 108 channels (9 long in z, 12 wide in phi) 4 FE cards (27 channels / FE card) 2 cables / octant to passive fanout card (27 bits / cable) 1 cable / passive fanout card to MTC05 (54 bits / cable) 1 cable / passive fanout card to MTC10 (54 bits / cable) B-layer (octants 5,6 only): CF (PDT's 115,116,135,136): 10 counters / PDT 2 phototubes / counter EF (PDT's 105,106,145,146): 8 counters / PDT 2 phototubes / counter hole counters 4 counters / octant 2 phototubes / counter 2 FE cards / octant 2 cables / octant to fan-in (on MCEN card) (40 bits / cable) 1 cable / fan-in to MTC05 (80 bits / cable) 1 cable / fan-in to MTC10 (80 bits / cable) C-layer: octants 0,1,2,3,4,7: 8 counters / PDT 2 phototubes / counter 5 PDT's / octant octants 5,6 (PDT's 205,206,245,246): 9 counters / PDT 2 phototubes / counter 2 FE cards / octant 2 cables / octant to fan-in (on MCEN card) (40 bits / cable) 1 cable / fan-in to MTC05 (80 bits / cable) 1 cable / fan-in to MTC10 (80 bits / cable) FE CRATES ========= CMSC: 34 FE cards total (16 layer A + 4 layer B + 14 layer C) 6 FE crates (3 east, 3 west): SCEAB (Scintillator Central East A/B) - 10 cards SCECT (Scintillator Central East C Top) - octants 0,1; 4 cards SCECB (Scintillator Central East C Bottom) - octants 6,7; 3 cards SCWAB (Scintillator Central West A/B) - 10 cards SCWCT (Scintillator Central West C Top) - octants 2,3; 4 cards SCWCB (Scintillator Central West C Bottom) - octants 5,4; 3 cards OR SCEA (Scintillator Central East A) - 8 cards SCETC (Scintillator Central East Top C) - octants 0,1; 4 cards SCEBC (Scintillator Central East B/C) - octants 6,7; 5 cards SCWA (Scintillator Central West A) - 8 cards SCWTC (Scintillator Central West Top C) - octants 2,3; 4 cards SCWBC (Scintillator Central West B/C) - octants 5,4; 5 cards 1 cable / crate to L2 1 cable / crate to MRC WAMUS TRIGGER ELECTRONICS LEVEL 1 ======= CF MTC05: 1 MTC05 / octant (16 channel capacity) 10 CFT cables / octant octants 0,1,2,3,4,7: 2 CMSC A-layer cables / octant (45 bits / cable) 1 CMSC C-layer cable / octant (80 bits / cable) octants 5,6: 1 CMSC A-layer cable / octant (45 bits / cable) 1 CMSC B-layer cable / octant (80 bits / cable) 1 CMSC C-layer cable / octant (80 bits / cable) CF MTC10: 1 MTC10 / octant (16 channel capacity) 13 PDT cables / octant (3 layer A, 5 layer B, 5 layer C) octants 0,1,2,3,4,7: 2 CMSC A-layer cables / octant (45 bits / cable) 1 CMSC C-layer cable / octant (80 bits / cable) octants 5,6: 1 CMSC A-layer cable / octant (45 bits / cable) 1 CMSC B-layer cable / octant (80 bits / cable) 1 CMSC C-layer cable / octant (80 bits / cable) MTCxx crate (platform): 1 crate 8 MTC05 cards, 8 MTC10 cards, 1 MTCM card, 1 68020 / crate 1 cable / MTCM to MTM 1 cable / MTCM to L1 trigger MRC 1 cable / MTCM to L2 preprocessor LEVEL 2 PREPROCESSOR ==================== 6 A-layer segment cards (1 card / octant, 0/7 and 3/4 combined) 4 input cables / card (3 PDT's, 1 CMSC A-layer) (1 CMSC A-layer cable / 3 cards => 2 cables) 8 B/C-layer segment cards 11 input cables / card (10 PDT's (5A, 5B), 1 CMSC C-layer) (1 CMSC C-layer cable / 4 cards => 2 cables) MUON READOUT CARDS (MRC) ======================== 2 modules / MRC (module = 1 PDT or 1 CMSC crate) detector MRC crates: CMET (Central Muon East Top): 13 PDT's (octant 1) (7 MRC's, 1 VBD) 730 bytes / event (3% PDT occupancy) CMES (Side): 23 PDT's (octants 0,7) (12 MRC's, 1 VBD) 1250 bytes / event (3% PDT occupancy) CMEB (Bottom): 11 PDT's (octant 6) & 2 east CMSC crates (7 MRC's, 1 VBD) 550 bytes / event (3% PDT occupancy, 1% CMSC occupancy) CMWT: 13 PDT's (octant 2) (7 MRC's, 1 VBD) 730 bytes / event (3% PDT occupancy) CMWS: 23 PDT's (octants 3,4) (12 MRC's, 1 VBD) 1250 bytes / event (3% PDT occupancy) CMWB: 11 PDT's (octant 5) & 2 west CMSC crates 7 MRC's, 1 VBD) 550 bytes / event (3% PDT occupancy, 1% CMSC occupancy) OR CEP1 (Central East PDT octant 1) - octant 1, 13 PDT's (7 MRC's, 1 VBD) CEP0 (Central East PDT octant 0) - octant 0, 13 PDT's (7 MRC's, 1 VBD) CEP7 (Central East PDT octant 7) - octant 7, 10 PDT's (5 MRC's, 1 VBD) CEP6 (Central East PDT octant 6) - octant 6, 11 PDT's (6 MRC's, 1 VBD) CESC (Central East Scintillator) - CMSC east (1 MRC, 1 VBD) CWP2 (Central East PDT octant 2) - octant 2, 13 PDT's (7 MRC's, 1 VBD) CWP3 (Central East PDT octant 3) - octant 3, 13 PDT's (7 MRC's, 1 VBD) CWP4 (Central East PDT octant 4) - octant 4, 10 PDT's (5 MRC's, 1 VBD) CWP5 (Central East PDT octant 5) - octant 5, 11 PDT's (6 MRC's, 1 VBD) CWSC (Central East Scintillator) - CMSC west (1 MRC, 1 VBD) FORWARD ANGLE MUON SYSTEM (FAMUS) ELECTRONICS DETECTORS ========= Mini Drift Tubes (MDT): 10 decks / octant (4A,3B,3C) preliminary channel counts (good within 2%): A-layer: 960 channels / octant / side 5 MDC's / octant /side (192 channels / MDC capacity) B-layer: octants 0,1,2,3,4,7 1056 channels / octant / side 6 MDC's / octant / side octants 5,6 768 channels / octant / side 4 MDC's / octant / side C-layer: octants 0,1,2,3,4,7 1320 channels / octant / side 7 MDC's / octant / side octants 5,6 768 channels / octant / side 4 MDC's / octant / side 134 MDC's / side * 2 sides = 268 MDC's 2 cables / MDC to MCEN (96 bits / cable) Forward Muon SCintillators (FMSC): 96 FMSC's / octant / layer 48 channels / FE card capacity 2 FE cards / octant / layer layers A,B,C: 2 output cables / octant / layer to fan-in (on MCEN card) (48 bits / cable) 1 output cable / fan-in to MTC05 (96 bits / cable) 1 output cable / fan-in to MTC10 (96 bits / cable) OR layer A: 2 output cables / octant to fan-in (on MCEN card) (48 bits / cable) 1 output cable / fan-in to MTC05 (96 bits / cable) 1 output cable / fan-in to MTC10 (96 bits / cable) layers B,C: 2 output cables / octant / layer to MTC05 (48 bits / cable) 2 output cables / octant / layer to MTC10 (48 bits / cable) FE CRATES ========= MDT: 24 crates (2 octants / layer / crate) (12 FE cards / crate) grouped as 7&0, 3&4 (vertical trusses), 1&2 (top trusses), 5&6 (bottom forward regions; between MDT planes?) 3.5 kbyte / crate 1 cable / crate to L2 1 cable / crate to MRC FMSC: 12 crates (4 octants / layer / crate) (8 FE cards / crate) grouped east/west (vertical trusses) 2.1 KByte / crate @ 2E32 MCEN: 12 inputs / MCEN card capacity 1 MCEN card / layer / octant 48 MCEN cards (2 * 24 / end) 4 MCEN crates (NE,NW,SE,SW) (platform) water cooled? 1.1 KByte / crate @ 10% occupancy OR 6 MCEN crates (north A,B,C; south A,B,C) (platform and/or trusses?) water cooled? 0.7 KByte / crate @ 10% occupancy layer A: 3 OR 4 output cables / MCEN card to MTC10 (96 bits / cable) layers B,C: 4 output cables / MCEN card to MTC10 (96 bits / cable) 3+4+4=11 output cables / octant from MCEN cards to MTC10 1 cable / MCEN crate to MRC in MUTR crate MCEN fan-in: 4 cables (2 in, 2 out) / fan-in channel 4 channels / MCEN fan-in card FMSC: layers A,B,C: 2 output cables / octant / layer / side into fan-in (48 bits / cable) 1 output cable / fan-in to MTC05 (96 bits / cable) 1 output cable / fan-in to MTC10 (96 bits / cable) 48 channels 12 MCEN fan-in cards (minimum) OR 16 cards (1 / octant / side) OR layer A: 2 output cables / octant into fan-in (48 bits / cable) 1 output cable / fan-in to MTC05 (96 bits / cable) 1 output cable / fan-in to MTC10 (96 bits / cable) 16 channels 4 MCEN fan-in cards CMSC: layer B: 2 cables / octant into fan-in (40 bits / cable) (octants 5,6 only) 1 cable / fan-in to MTC05 (80 bits / cable) 1 cable / fan-in to MTC10 (80 bits / cable) layer C: 2 cables / octant to fan-in (40 bits / cable) 1 cable / fan-in to MTC05 (80 bits / cable) 1 cable / fan-in to MTC10 (80 bits / cable) 10 channels total 3 MCEN fan-in cards 15 OR 19 total MCEN fan-in cards 1 MCEN fan-in card crate (for configuration with 3 MCEN crates) OR cards located in MCEN crates (for configuration with 6 MCEN crates) OR 7 total MCEN fan-in cards cards located in MCEN crates FAMUS TRIGGER ELECTRONICS LEVEL 1 ======= EF MTC05: 16 channels / MTC05 capacity 1 MTC05 / octant 10 CFT cables / octant 3 FMSC cables / octant (1A,1B,1C) (96 bits / cable) EF MTC10: 16 channels / MTC10 capacity 1 MTC10 / octant 11 OR 12 MCEN cables/octant (3A OR 4A, 4B, 4C) (96 bits / cable) 3 FMSC cables/octant (1A,1B,1C) (96 bits / cable) MTCxx crates (platform): 2 crates (1 north, 1 south) 8 MTC05 cards, 8 MTC10 cards, 1 MTCM card, 1 68020 / crate 1 cable / MTCM to MTM 1 cable / MTCM to L1 trigger MRC 1 cable / MTCM to L2 preprocessor LEVEL 2 PREPROCESSOR ==================== 4 A-layer segment cards 2 input cables / card (1 MCEN, 1 FMSC) 4 B/C-layer segment cards 3 input cables / card (1 MCEN, 2 FMSC) MUON READOUT CARDS (MRC) ======================== 2 modules / MRC (module = 1 MDT crate or 1 FMSC crate) detector MRC crates: FMN (Forward Muon North): 12 MDT crates & 6 FMSC crates (9 MRC's, 1 VBD) FMS (South): 12 MDT crates & 6 FMSC crates (9 MRC's, 1 VBD) 570 bytes / MRC crate / event OR FNM (Forward North MDT): 12 north MDT crates (6 MRC's, 1 VBD) FNSC (forward North Scintillator) - 6 north FMSC crates (3 MRC's, 1 VBD) FSM (Forward South MDT): 12 south MDT crates (6 MRC's, 1 VBD) FSSC (forward South Scintillator) - 6 south FMSC crates (3 MRC's, 1 VBD) L1 MUON TRIGGER MANAGER (MTM) & MRC'S L1 MTM crate: 1 MTM card 3 input cables (1 from each MTCxx crate's MTCM) 1 output cable to trigger framework 1 output cable from MTM crate to MRC in MUTR crate L1 MRC crate: MUTR (Muon Trigger) crate: central MTCxx crate MTCM (0.5 MRC) 270 bytes / event (independent of occupancy) north MTCxx crate MTCM (0.5 MRC) 270 bytes / event (independent of occupancy) south MTCxx crate MTCM (0.5 MRC) 270 bytes / event (independent of occupancy) MTM crate (0.5 MRC) <100 bytes / event (independent of occupancy) 3 OR 6 MCEN crates (1.5 OR 3 MRC's) 270 bytes / event (independent of occupancy) 3 OR 5 MRC cards total 1 VBD < 1720 bytes / event