// GSTM.h: interface for the GSTM class.
//
//////////////////////////////////////////////////////////////////////

#if !defined(AFX_GSTM_H__A2E23202_7AD9_11D5_9122_00E029671A14__INCLUDED_)
#define AFX_GSTM_H__A2E23202_7AD9_11D5_9122_00E029671A14__INCLUDED_

#if _MSC_VER > 1000
#pragma once
#endif // _MSC_VER > 1000


#include "VMEInterface.h"
#include "gstm_define.h"
#include "utility.h"

class GSTM  
{
public:
	// default constructor
	GSTM();
	// constructor with a crate and a VME base
	GSTM(unsigned int crate,unsigned int vmebase=(GSTM_VME_BASE));
	virtual ~GSTM();

	// set up the GSTM
	void setup(unsigned int crate,unsigned int vmebase=(GSTM_VME_BASE));
	//	reset method
	void reset();
	//enable single bits
	void enableBit(unsigned int offset,unsigned int bit);
	//overloaded method to enable single bit
	void enableBit(unsigned int offset_bit);
	//Disable single bit
	void disableBit(unsigned int offset,unsigned int bit);
	//overloaded method to disable single bit
	void disableBit(unsigned int offset_bit);
	//Reads a register (including the fifo)
	unsigned int getRegister(unsigned int offset);
	//Writes a register (including the fifo)
	void setRegister(unsigned int offset,unsigned int cmd);
	//Sends standard events
	void sendStandardEvent();
	//Loops standard events using the restart bit on the GSTM
	void restartLoop();
	//Sends double or triple sized events
	void sendDoubleEvent();
	//Loops events **Doesn't work**
	void LoopEvents();
	//A method to ensure that the gstm stops sending
	void stopSending();

private:
	unsigned int _crate;                  // crate number (i.e. Bit-3 unit)
	unsigned int _gstmbase;                // VME base address
	VMEInterface a32super;

};

// set a single bit in a register to 1
inline void GSTM::enableBit(unsigned int offset,unsigned int bit)
{
	unsigned int mask0=a32super.read32(_gstmbase+offset);
	unsigned int cmd=setBit(mask0,bit%0x20,1);
	a32super.write32(_gstmbase+offset,cmd);
}
inline void GSTM::enableBit(unsigned int offset_bit)
{
	unsigned int offset=offset_bit/0x100;
	unsigned int bit=offset_bit%0x100;
	enableBit(offset,bit);
}


// set a single bit in a register to 0
inline void GSTM::disableBit(unsigned int offset,unsigned int bit)
{
	unsigned int mask0=a32super.read32(_gstmbase+offset);
	unsigned int cmd=setBit(mask0,bit%0x20,0);
	a32super.write32(_gstmbase+offset,cmd);
}
inline void GSTM::disableBit(unsigned int offset_bit)
{
	unsigned int offset=offset_bit/0x100;
	unsigned int bit=offset_bit%0x100;
	disableBit(offset,bit);
}

// get the register content
inline unsigned int GSTM::getRegister(unsigned int offset)
{
	return(a32super.read32(_gstmbase+offset));
}

// set a register 
inline void GSTM::setRegister(unsigned int offset,unsigned int cmd)
{
	a32super.write32(_gstmbase+offset,cmd);
}

#endif // !defined(AFX_GSTM_H__A2E23202_7AD9_11D5_9122_00E029671A14__INCLUDED_)