//
// file: gstm.cpp
// purpose: Control the GSTM module
// written for the AlphaPC164
//
//
#include <stdio.h>
#include <unistd.h>
#include "l2pci/PCIDev.hpp"
#include "l2mbus/DMADev.hpp"
#include "l2mbus/TSIDev.hpp"
#include "l2mbus/PIODev.hpp"
#include <math.h>

// setup for VME:
#include "l2vme/UIIDev.hpp"
#include "l2pci/MemMap.hpp"
#include "l2vme/LocalVmeMaster.hpp"

// include file containing GSTM defines
#include "gstm_define.h"
#include "gstm_masks.h"

using namespace l2vme;
using namespace l2mbus;


uint32 swap(uint32 data) { return(((data&0xff000000)>>24) |
			     ((data&0x00ff0000)>> 8) |
			       ((data&0x0000ff00)<< 8) |
				 ((data&0x000000ff)<<24) );
			       }

void rsleep(uint32 i) { // sleep in microseconds
  for(uint32 k=0;k<i;k++) {
    float temp;
    for(uint32 j=0;j<52;j++) temp+=j*j;
  }
}

// change bit in variable to value (0 or 1)
uint32 setBit(uint32 variable,uint32 bit,uint32 value);
inline void enableBit(uint32 offset,uint32 bit, LocalVmeMaster *pvme);
inline void enableBit(uint32 offset_bit, LocalVmeMaster *pvme);
inline void disableBit(uint32 offset,uint32 bit, LocalVmeMaster *pvme);
inline void disableBit(uint32 offset_bit, LocalVmeMaster *pvme);
uint32 getRegister(uint32 offset);
inline void setRegister(uint32 offset,uint32 cmd, LocalVmeMaster *pvme);
inline void reset( LocalVmeMaster *pvme);

int main(int argc, char **argv)
{
  uint32 i,j,k,inloop;
  printf("This program tests the FIC module\n");
  printf("by sending simulated events to be processed on the alpha\n");
  uint32 nevents=1;
    
    
  //
  //////////////////////////////////////////////////////////////////////
  //
  // set everything up initially:
  //
  // the GSTM part:
  //
  // Make sure UII Singleton Object is created and get pointer
  UIIDev* uii = &(UIIDev::instance());

  // choose a master (from 0 to 7)
  uint32 masterID = 0x0;  // ID of master window to enable
  // GSTM base address in slot 12
  uint32 vmeBase = 0x60000000;
  // base address for fics in slot 5
  //vmeBase=0x0f000000; // bit-3 DPM base
  LocalVmeMaster a32super(masterID,vmeBase,LSI_CFG_A32D32); 
  a32super.set_byteSwapOff();
  LocalVmeMaster *pvme=&a32super;
  
  uint32 offset,cmd,mask0=0;
  //
  // set up the GSTM:
  // 
  offset=GSTM_TEST;
  mask0=0;
  printf("The GSTM module has ID %0x\n",
	 swap(a32super.read32(offset)));
  ////////////////////////////////////////////
  
  int data_nevts=1,data_nexp=0,c=0;
  int evtsize = 128;
  uint32 data1;
  int Debug = 0;
  printf("Initializing GSTM\n");
  reset(pvme);
  if (Debug) {
    printf("GSTM RESET\n");
    scanf("%d",c);}

  rsleep(200);
  //Initial Setup for the GSTM
  //Enable T1 port 
  enableBit(MODE_ENABLE_T1,pvme);
  if (Debug) {
    printf("GSTM T1 enabled\n");
    scanf("%d",c);}
  //Enable 20 bit mode
  enableBit(MODE_M20SEL,pvme);
   if (Debug) {
    printf("GSTM m20sel\n");
    scanf("%d",c);}
//rsleep(500);
  //Enable port control
  enableBit(CTRL_CTRL_T1,pvme);
   if (Debug) {
    printf("GSTM port control enabled\n");
    scanf("%d",c);}
//rsleep(500);
  //Disable port control
  disableBit(CTRL_CTRL_T1,pvme);
   if (Debug) {
    printf("GSTM port control disabled\n");
    scanf("%d",c);}
  //enable port control
  enableBit(CTRL_CTRL_T1,pvme);
   if (Debug) {
    printf("GSTM port control enabled\n");
    scanf("%d",c);}
  //Disable port control
  disableBit(CTRL_CTRL_T1,pvme);
   if (Debug) {
    printf("GSTM port control disabled\n");
    scanf("%d",c);}
  printf("Enter the exponent for the number of events >1\n");
  scanf("%d",&data_nexp);
  for (k=0;k<data_nexp;k++)  data_nevts=data_nevts*10;
  //divide by two because two events are in the fifo
  //data_nevts=data_nevts;
  printf("Begining transfer of %d events\n",data_nevts);
//Set data to fifo
  for (k=0;k<(data_nevts+(100*data_nexp));k++) 
    {
     if (k%1000==0) printf("Transfered %d events\n",k);
      reset(pvme);
       if (Debug) {
	 printf("In event Reset GSTM\n");
	 scanf("%d",c);}
       rsleep(1500);
      //Enable T1 port 
      enableBit(MODE_ENABLE_T1,pvme);
       if (Debug) {
	 printf("In event T1 enabled\n");
	 scanf("%d",c);}
      //Enable 20 bit mode
      enableBit(MODE_M20SEL,pvme);
       if (Debug) {
	 printf("In event M20SEL\n");
	 scanf("%d",c);}
      //Enable port control
      enableBit(CTRL_CTRL_T1,pvme);
       if (Debug) {
	 printf("In event port control enabled\n");
	 scanf("%d",c);}
      //Set data to fifo
      for (i=0;i<2;i++) //This loop controls the number of events per loop
	                // 2 is the maximum that will fit in the broken fifo's
	{
	  for (j=0;j<evtsize;j++) 
	    {
	      data1=0x00400100+(0x0202*j);
	      if (j==0) data1 = setBit(data1,16,1);
	      setRegister(GSTM_T11,data1,pvme);
	    }
	  data1=0x40a5a5;
	  for (j=0;j<8;j++) setRegister(GSTM_T11,data1,pvme);
	  data1=0x405a5a;
	  for (j=0;j<8;j++) setRegister(GSTM_T11,data1,pvme);
	  data1=0x40a5a5;
	  for (j=0;j<8;j++) setRegister(GSTM_T11,data1,pvme);
	  data1=0x405a5a;
	  for (j=0;j<8;j++) 
	    {
	      if (j==7) data1 = setBit(data1,17,1); //This is the end of event                                                     // character
	      setRegister(GSTM_T11,data1,pvme);
	    }
	}
      setRegister(GSTM_T11,0x00f00001,pvme);//This line seems to be required or                                          //else the fic fifo fills with errors
                                        //after the event
			
      //Disable port control
      disableBit(CTRL_CTRL_T1,pvme);
       if (Debug) {
	 printf("In event disable port control\n");
	 scanf("%d",c);}
rsleep(1500);
      //Start transmission
      enableBit(CTRL_START_TRANS,pvme);
       if (Debug) {
	 printf("In event transmitting\n");
	 scanf("%d",c);}
rsleep(1500);
      //enable port control
      enableBit(CTRL_CTRL_T1,pvme);
       if (Debug) {
	 printf("In event enable port control\n");
	 scanf("%d",c);}
rsleep(1500);
      //Disable port control
      disableBit(CTRL_CTRL_T1,pvme);
       if (Debug) {
	 printf("In event disable port control\n");
	 scanf("%d",c);}
rsleep(1000);
		
    }

  printf("\n \a");	       
  //
  return 0;

}

///////////////////////////////////////////////////////////////////
//
// change a single bit in a variable
uint32 setBit(uint32 variable,uint32 bit,uint32 value)
{
  bit=bit%0x20;
  if (value>1) value=1;
  // create a bit pattern with a single 0
  uint32 mask0=~(0x1<<bit);
  // mask out that bit in variable
  uint32 mask1=variable&mask0;
  // change the value
  uint32 newbit=value<<bit;
  return(mask1|newbit);
}
///////////////////////////////////////////////////////////////////
// set a single bit in a register to 1
inline void enableBit(uint32 offset,uint32 bit, LocalVmeMaster *pvme)
{
 
  uint32 mask0=swap(pvme->read32(offset));
  uint32 cmd=setBit(mask0,bit%0x20,1);
  pvme->write32(offset,swap(cmd));
}

inline void enableBit(uint32 offset_bit, LocalVmeMaster *pvme)
{
 
  uint32 offset=offset_bit/0x100;
  uint32 bit=offset_bit%0x100;
  enableBit(offset,bit,pvme);
}


// set a single bit in a register to 0
void disableBit(uint32 offset,uint32 bit, LocalVmeMaster *pvme)
{
  
  uint32 mask0=swap(pvme->read32(offset));
  uint32 cmd=setBit(mask0,bit%0x20,0);
  pvme->write32(offset,swap(cmd));
}
inline void disableBit(uint32 offset_bit, LocalVmeMaster *pvme)
{
 
  uint32 offset=offset_bit/0x100;
  uint32 bit=offset_bit%0x100;
  disableBit(offset,bit,pvme);
}

// get the register content
uint32 getRegister(uint32 offset, LocalVmeMaster *pvme)
{
 
  return(swap(pvme->read32(offset)));
}

// set a register 
inline void setRegister(uint32 offset,uint32 cmd, LocalVmeMaster *pvme)
{
  pvme->write32(offset,swap(cmd));
}

//Reset
inline void reset(LocalVmeMaster *pvme)
{
 
  uint32  offset,cmd;
  // start by writing 0 to the control and mode registers.
  offset=GSTM_CTRL;
  cmd=0x0;
  pvme->write32(offset,swap(cmd)); 
  offset=GSTM_MODE;
  cmd=0x0;
  pvme->write32(offset,swap(cmd)); 
  // reset the module, which requires
  //several writes, all of them are sticky.
  offset=GSTM_CTRL;
  uint32 mask0=swap(pvme->read32(offset));
  // global reset:
  cmd=setBit(mask0,CTRL_RESET,1);
  pvme->write32(offset,swap(cmd)); 
  mask0=swap(pvme->read32(offset));
  // wait a little while
  rsleep(500);
  cmd=setBit(mask0,CTRL_RESET,0);
  pvme->write32(offset,swap(cmd));
  mask0=swap(pvme->read32(offset));
  // reset the error status bit
  cmd=setBit(mask0,CTRL_CLR_ERROR,1);
  pvme->write32(offset,swap(cmd));
  mask0=swap(pvme->read32(offset));
  cmd=setBit(mask0,CTRL_CLR_ERROR,0);
  pvme->write32(offset,swap(cmd));
  mask0=swap(pvme->read32(offset));
  // Clear the FIFOs
  cmd=setBit(mask0,CTRL_CLR_FIFO,1);
  pvme->write32(offset,swap(cmd));
  mask0=swap(pvme->read32(offset));
  cmd=setBit(mask0,CTRL_CLR_FIFO,0);
  pvme->write32(offset,swap(cmd));
  mask0=swap(pvme->read32(offset));
}