//
// Defines for the GSTM module
//
//
// Register offsets:
#define GSTM_TEST   0x0   // test register
#define GSTM_CTRL   0x10  // control register
#define GSTM_MODE   0x20  // mode register
#define GSTM_STATUS 0x30  // status register
#define GSTM_T11    0x40  // FIFO T11 register

// Defines for Control register bits
#define CTRL_RESET         (0+GSTM_CTRL*0x100)     // Reset bit
#define CTRL_CLR_ERROR     (3+GSTM_CTRL*0x100)     // Clear ERROR status bit
#define CTRL_STOP_TRANS    (4+GSTM_CTRL*0x100)    // stop transmitting
#define CTRL_START_TRANS   (5+GSTM_CTRL*0x100)    // start transmitting
#define CTRL_RESTART_TRANS (6+GSTM_CTRL*0x100)    // restart transmitting
#define CTRL_LOOP_TRANS    (7+GSTM_CTRL*0x100)    // loop over transmitting
#define CTRL_CLR_FIFO      (8+GSTM_CTRL*0x100)    // clear FIFOs

#define CTRL_USER0        (11+GSTM_CTRL*0x100)    // user defined bit
#define CTRL_USER1        (12+GSTM_CTRL*0x100)    // user defined bit
#define CTRL_USER2        (13+GSTM_CTRL*0x100)    // user defined bit

#define CTRL_CTRL_T1      (31+GSTM_CTRL*0x100)    // control signal to T1  port

// 
// Defines for Mode register
#define MODE_ENABLE_T1     (3+GSTM_MODE*0x100)    // enable T1 port
#define MODE_T1_MODE       (7+GSTM_MODE*0x100)    // choose 20 bit mode
#define MODE_M20SEL        (7+GSTM_MODE*0x100)    // choose 20 bit mode
#define MODE_USER0         (9+GSTM_MODE*0x100)    // user defined bit
#define MODE_USER1        (10+GSTM_MODE*0x100)    // user defined bit
#define MODE_FF           (10+GSTM_MODE*0x100)    // FF line chooses fill frame type
#define MODE_USER2        (11+GSTM_MODE*0x100)    // user defined bit
#define MODE_FLAGSEL      (11+GSTM_MODE*0x100)    // SET TO 0 to transfer 20bits
#define MODE_USER3        (12+GSTM_MODE*0x100)    // user defined bit
#define MODE_USER4        (13+GSTM_MODE*0x100)    // user defined bit