STT design page


Documents about STTpp design


Documents about DØ trigger


motherboard, LTB, LRB

top of page

FRC

top of page

L1CTT, L1 broadcasting

top of page

clustering, STC

top of page

Track fitting

top of page

STT testing and commissioning:

top of page

STT monitoring:

top of page


downloading, control

top of page

STT simulator:

top of page

Queueing studies:

top of page

Links to DØ online related pages:

top of page

Links to DØ electronics related pages:

top of page

SMT/STT numbering, data flow, etc.

top of page

SMT alignment issues

top of page

Links to trigger related pages

top of page


VBD,VRB,VTM,...

top of page

in-crate CPU

top of page

FPGA's

top of page

VHDL

top of page

back to STT homepage


last updated 31 May 2002